电子工程专辑

Xilinx V7 690T PCIe IP核使用时有关TAG号的一个BUG

- 在 Vivado 工具中例化 Xilinx V7 系列的 PCIe Endpoint（EP）IP 核时，会遇到配置选项 「Extended Tag Field」（扩展标签字段），其作用与 TAG 号的位宽直接相关： - 勾选该选项：IP 核会宣称支持「8bit 位宽的 TAG 字段」，理论上可同时处理 2^8=256个TAG号（对应 PCIe 设备空间 ...
insideHPC

Xilinx FPGAs PCI Express 1.1 compliant

Continuing our recent accelerated processing rif, Xilinx announced that they successfully completed all the tests in the PCI-SIG’s PCI Express v1.1 compliance suite. Xilinx has the first FPGA offering ...
EDN

Low Profile PCIe FPGA Kit

PLDA announced a new board to its suite of FPGA Design Kit solutions. The PLDA XpressV7‐LP provides an FPGA‐based low‐profile PCI Express form factor card, incorporating 40Gb of ...
EDN

Xilinx ships 65-nm FPGA with hard-coded PCIe block, Ethernet MAC

San Jose, Calif.—FPGA vendor Xilinx Inc. has started to ship its second set of FPGAs manufactured using 65-nn process technology. Intended for high-performance logic with serial connectivity, the ...
Electronic Design

Xilinx FPGAS Integrate PCIe Blocks

Recent additions to the Virtex-5 field programmable gate array (FPGA) platform, the LX30T, LX50T, and LX110T, embark as the first FPGAs to integrate hard-coded PCI Express endpoints and tri-mode ...
新浪网

Palladium模拟器和用于PCIe调试的FPGA有什么区别？

PCI-SIG外围组件互连 Express Gen5是一种系统协议，主要用于系统中高速的数据传输。PCIe Gen5可实现32 Gb/s的传输速率。PCIe 几乎集成在所有计算机系统中，包括服务器。 PCIe是一种复杂的协议，包括链路训练、TLP生成和事务、不同的有效载荷传输、错误TLP、流量控制 ...
Business Wire

Opal Kelly Announces XEM8320 FPGA Development Platform for Xilinx FPGAs

PORTLAND, Ore.--(BUSINESS WIRE)--Opal Kelly, a leading producer of powerful Field Programmable Gate Array (FPGA) modules that provide essential device-to-computer interconnect, today announced the ...
The Next Platform

Xilinx Tunes Up FPGAs For HPC, Graph Analytics

High performance computing hardware is really a software game, and the software we are referring to is at a very low level where deep expertise in libraries and solvers can make the difference between ...